Fundamental Digital Electronics by Brian Lawless
Copyright Brian Lawless.
Contents
Unit 1
Text
or
Overheads
Electronic characteristics of TTL gates
Unit 2
Text
or
Overheads
Schottky TTL
Unit 3
Text
or
Overheads
CMOS Complementary Metal Oxide Silicon
Unit 4
Text
or
Overheads
ECL Emitter Coupled Logic
Unit 5
Text
or
Overheads
Logic Gates
Unit 6
Text
or
Overheads
Number Systems
Unit 7
Text
or
Overheads
Number Codes
Unit 8
Text
or
Overheads
Error Detection Codes
Unit 9
Text
or
Overheads
Boolean Algebra
Unit 10
Text
or
Overheads
De Morgan's Theorem
Unit 11
Text
or
Overheads
Canonical forms
Unit 12
Text
or
Overheads
Minterms and Maxterms
Unit 13
Text
or
Overheads
Boolean minimization
Unit 14
Text
or
Overheads
Karnaugh Maps
Unit 15
Text
or
Overheads
Matrix Minimization Method
Unit 16
Text
or
Overheads
Quine-McCluskey reduction
Unit 17
Text
or
Overheads
Espresso minimization algorithm
Unit 18
Text
or
Overheads
Binary Decision Diagrams
Unit 19
Text
or
Overheads
Reed-Muller Canonical Form
Unit 20
Text
or
Overheads
R-M Applications and Minimization
Unit 21
Text
or
Overheads
Programmable Logic Devices
Unit 22
Text
or
Overheads
RS and D type Flip-Flops
Unit 23
Text
or
Overheads
JK flip-flop
Unit 24
Text
or
Overheads
Modulo n Counters
Unit 25
Text
or
Overheads
Shift registers and pseudo random generators
Unit 26
Text
or
Overheads
Sequential Circuit Models
Unit 27
Text
or
Overheads
Asynchronous Sequential Circuits
Appendix A
The ASCII Character Set
Appendix B
The Default GSM Text Mode Alphabet
Appendix C
The Minimization Map Template
"Text" is the full text of the Unit
"Overheads" is the set of lecture overheads and provides a summary of the Unit
"Compute" is a Java module which computes specific problems
Please report any snags in the operation of this web page to me bl@physics.dcu.ie.
Previously identified snags and the cures are listed
here.
Contact details:
Brian Lawless, Physics Department, Dublin City University, Dublin 9, Ireland.
Email: bl@physics.dcu.ie